1. Technical Field
The disclosure relates to a semiconductor technology, and more particularly, to a stacked package and a method for manufacturing the same.
2. Description of the Related Art
In the semiconductor industry, packaging technologies for integrated circuits have been continuously been developed to satisfy the demands toward miniaturization and mounting reliability. In recent years, as miniaturization and high performance are demanded in electric and electronic products, various stacking techniques have been developed.
The term “stack” as used in the semiconductor industry means to pile vertically two or more semiconductor chips or semiconductor packages. With these stacking technologies, a memory element may have a memory capacity two or more times greater than that obtainable through semiconductor integration process. Besides the increased memory capacity, the stacked packages also have advantages in terms of mounting density and efficient utilization of a mounting area. For these reasons, research and development for stacked packages have been accelerated.
Among these stacked packages, a Package-On-Package (POP) type stacked package is manufactured by stacking two completely assembled semiconductor packages. Therefore, the POP type stacked package has an advantage in that only the packages sorted as good products through the final electrical test can be selected and assembled.